Defect-engineered room temperature damaging differential resistance in monolayer MoS2 transistors


The damaging differential resistance (NDR) impact has been extensively investigated for the event of assorted digital gadgets. Other than conventional semiconductor-based gadgets, two-dimensional (2D) transition steel dichalcogenide (TMD)-based field-effect transistors (FETs) have additionally not too long ago exhibited NDR conduct in a number of of their heterostructures. Nevertheless, to look at NDR within the type of monolayer MoS2, theoretical prediction has revealed that the fabric needs to be extra profoundly affected by sulfur (S) emptiness defects. On this work, monolayer MoS2 FETs with a certain amount of S-vacancy defects are fabricated utilizing three approaches, particularly chemical remedy (KOH resolution), bodily remedy (electron beam bombardment), and as-grown MoS2. Primarily based on systematic research on the correlation of the S-vacancies with each the system’s electron transport traits and spectroscopic evaluation, the NDR has been clearly noticed within the defect-engineered monolayer MoS2 FETs with an S-vacancy (VS) quantity of ∼5 ± 0.5%. Consequently, steady NDR conduct may be noticed at room temperature, and its peak-to-valley ratio can be successfully modulated by way of the gate electrical area and lightweight depth. Via these outcomes, it’s envisioned that extra digital functions primarily based on defect-engineered layered TMDs will emerge within the close to future.

Graphical abstract: Defect-engineered room temperature negative differential resistance in monolayer MoS2 transistors


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